Three Methods. Three Different Most-Important Nodes. Same Circuit.
We ran FPL cross-layer analysis, structural betweenness, and state correlation on ISCAS85 c6288 (16x16-bit Wallace tree multiplier, 2448 nodes). All three identified different nodes as most important. Betweenness: node 6207 (internal final-adder gate). State correlation: node 256 (A[15], MSB -- betweenness=0.00). Structural degree: node 1 (tied with 31 others). Node 256 has state_correlation degree=81 but betweenness=0 -- invisible to single-layer structural analysis. FPL holds strongly (r=0.5004, p=0.002, z=+23.22 above null). 1022/2448 nodes (42%) are cross-layer divergers. Directly answers the critique of H_LOGIC_BLACKBOX_v1. Pre-registered. 4/4 confirmed.
Background
H_LOGIC_BLACKBOX_v1 ran IRDME on a 4-bit ripple carry adder with all gate labels removed. 4/4 hypotheses confirmed -- the carry-chain gates were identified as structural hubs.
A reviewer raised a valid critique: a ripple-carry adder has a linear carry chain trivially recoverable by any graph centrality metric. The experiment validated the IRDME pipeline but did not show that FPL reveals something betweenness does not.
This experiment is the direct answer.
Setup
- ISCAS85 c6288: 16x16-bit Wallace tree combinatorial multiplier.
- 2448 nodes (32 primary inputs, 32 outputs, 2416 internal gates)
- 4800 structural_wiring edges
- 14776 state_correlation edges (Pearson r > 0.40, 2000 Monte Carlo patterns)
- Three analyses run on the same circuit:
- Structural wiring DEGREE (fan-out count)
- Structural wiring BETWEENNESS (single-layer directed, source nodes get 0)
- State correlation DEGREE (correlated partner count)
- Pre-registered before any analysis:
- Hash: ecc2d718
- Timestamp: 2026-06-02T23:50:53 UTC
- Commit: https://github.com/vladi160/preregistrations/commit/0b2e5a7
Results -- 4/4 Confirmed
h1 FPL holds: CONFIRMED. r=0.5004, p=0.002. Null model: z=+23.22 (23 sigma above permutation null -- not an artifact).
h2 Node 256 top-3 in state_correlation: CONFIRMED at rank 1. Node 256 = A[15] (MSB of operand A), state_correlation degree=81.
h3 Node 1 top-5 in structural_wiring: CONFIRMED at rank 1. Node 1 = A[0] (LSB). All 32 primary inputs tied at degree=16 in structural_wiring.
h4 At least 150 divergers with rank_gap >= 100: CONFIRMED with 1022 divergers (42% of circuit, threshold auto-set to 612).
The Three-Way Comparison
The three analyses identify completely different #1 hubs:
Structural wiring DEGREE: node 1 (A[0], LSB of A). All 32 primary inputs tied at degree=16 -- no discrimination possible.
Structural wiring BETWEENNESS: node 6207 (internal final-adder gate, bw=3408). Top 10 are all internal gates in the 6000 range. Betweenness of node 256 (A[15]): 0.00. Primary inputs are source nodes in a DAG -- no paths pass through them, betweenness is zero by definition.
State correlation: node 256 (A[15], MSB of A, degree=81). Node 1 (A[0]) is NOT in the top 5, despite having the same structural degree.
The Key Finding
Node 256 (A[15]) and node 1 (A[0]) are structurally IDENTICAL in the wiring graph. Both have exactly degree=16 in structural_wiring. Wiring degree cannot distinguish them at all.
In state_correlation, node 256 has degree=81 and node 1 has far fewer correlations. The MSB of the multiplier's input operand is the most behaviorally influential node. The LSB is not. FPL cross-layer analysis reveals this asymmetry. Structural analysis alone -- degree or betweenness -- cannot.
For node 256: betweenness=0.00, state_correlation rank=#1. These are opposite extremes of the same node's ranking under different metrics.
The Three Structural Zones
1022 cross-layer divergers (42% of circuit) split the circuit into three identifiable zones:
Zone 1 -- Betweenness-only hubs: Final carry-propagate adder nodes (6207, 6197, 6227...). High wiring betweenness. Low state_correlation. These are on many structural paths but do not dominate the state space.
Zone 2 -- State-correlation-only hubs: Primary input MSBs (256=A[15], 273=B[0]). Betweenness=0. High state_correlation. These causally influence many downstream computations but are invisible to betweenness.
Zone 3 -- FPL cross-layer persistent hubs: Mid-order input bits (35=A[2], 52=A[3], 69=A[4]). Appear in top-5 of BOTH structural_wiring degree and state_correlation. These are the nodes FPL identifies as persistently important across both metrics.
What This Means
Betweenness finds the structural critical path (internal final-adder gates all paths flow through). State_correlation finds the causal influence sources (MSB inputs that determine the most downstream computations). FPL r=0.5004 says they are correlated overall (z=+23.22), but the 42% diverger rate shows they tell fundamentally different stories for nearly half the nodes.
The three-zone structure is the result: different structural analysis methods reveal different aspects of the same circuit. FPL cross-layer analysis identifies a third perspective -- the persistent hubs that matter by BOTH structural and behavioral metrics simultaneously. None of the three methods is wrong; they are measuring different structural properties.
Limitations
Betweenness was computed by sampled BFS (200 source nodes) rather than exact Brandes. The key result -- betweenness=0 for all primary inputs -- is exact regardless. State_correlation uses Monte Carlo (2000 patterns); different seeds may shift specific node rankings within the input tier. This experiment tests one circuit family; whether three-zone structure appears in control logic (c1908) is untested.
Pre-Registration Record
Reproducibility
This result was pre-registered before analysis. SHA-256 hash: ecc2d71886b8c43f87b86087ab2f346aa53ee096b7da2313816326f122717bf8
Verify at github.com/vladi160/preregistrations